14. For a given sample-and-hold circuit, if th...

14. For a given sample-and-hold circuit, if the value of the hold capacitor is increased, then  

(A) Droop rate decreases and acquisition time decreases  

(B) Droop rate decreases and acquisition time increases  

(C) Droop rate increases and acquisition time decreases  

(D) Droop rate increases and acquisition time increases

Hint: 

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