Member Since 2 years 3 months
Suppose there is unpipelined processor with a cycle time 30 ns which is evenly divided into 5 pipeline stages. The total latch latency of the pipeline will be _______________ ns (integer value only).
where do u get this 1 added with 6?
is there any difference between total latch latency of pipeline and total latency of pipeline ? If yes , then question didn't contain value of latch latency .
Did not found what you are looking for, Ask your doubt or Help by your contribution
Here is a chance to join biggest community of technical Students, Tutors with FREE learning resources and so much more.
It takes less then 60 seconds.