An unpipelined processor has got the cycle time of 15 ns. Now the processor is pipelined into three stages and 15 ns is divided among three stages as
Stage 1: 6 ns
Stage 2: 5 ns
Stage 3: 4 ns
The latch latency is 2 ns. Now the cycle time of new processor will be _______________ ns (integer value only).

Responses

sumitverma's picture

6 ns + 2 ns = 8 ns

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