An unpipelined processor has got the cycle time of 15 ns. Now the processor is pipelined into three stages and 15 ns is divided among three stages as
Stage 1: 6 ns
Stage 2: 5 ns
Stage 3: 4 ns
The latch latency is 2 ns. Now the cycle time of new processor will be _______________ ns (integer value only).


sumitverma's picture

6 ns + 2 ns = 8 ns

Did not found what you are looking for, Ask your doubt or Help by your contribution

Enter your search keyword:

Search form


Here is a chance to join biggest community of technical Students,
Tutors with FREE learning resources and so much more.
It takes less then 60 seconds.