We are considering two-way set associative cache memory, which consists of four blocks. To choose which block to be replaced we will use LRU scheme. The sequence of block address is 6, 10, 0, 10, 6. The number of cache miss will be _________________ (integer value only).
1st miss → 6 (goes in 0th set)
2nd miss → 10 (goes in 0th set)
3rd miss → 0 (goes in 0th set, replaces 6)
10 is already present so no miss
4th miss → 6 (goes in 0th set, replaces 10)
So total no of miss = 4