- It implements a vector interrupt.
- It provides non-uniform priority to interrupting devices. It means the device with the highest priority is connected in the first place.
- There is a single processor data bus.
The interrupt acknowledges line is daisy chained through the modules. When the processor senses an interrupt, it sends out an interrupt acknowledge. This signal propagates through a series of I/O modules until it gets to a requesting module. The device that is connected in the first place will see the interrupt acknowledge before anyone. If the interrupt is really sent by this, it will forward 0 and if not then it will do nothing on seeing the acknowledgment bit.