Ya. I agree that they would be having different answers for this. The reason being- their are 2 types of cache organization- Simultaneous access and Hierarchical access. When nothing is given in the question, Which cache organization to choose is a big question and that's why you see the difference in their answers. Just have the concept clear and don't worry. Previously, GATE used to ask some ambiguous questions like this, but now they don't.
5 Mar 2019 - 11:54pm
@mayankv Whatever the case be. As far as i know, there is no such real life scenario. If you know some then pls share.
25 Jan 2019 - 9:30am
@techtud I was trying to give the test but it's showing that the quiz is closed. When will this be open in general for practice? What is the date of next live exam if there is any?
@varunam1 when you gave the test?
25 Jan 2019 - 9:13am
No. If routers start doing this then it would add a lot more overhead on the routers. They would have to maintain a separate queue for packets coming from every unique source to same destination and then combining them. better to just forward it to the next link and if required fragment the packets.
22 Jan 2019 - 7:06pm

why 6? check this using binary search, we would be looking in this sequence-> a16,a24,a28,a29,a30 => 5 comparisons.

22 Jan 2019 - 7:01pm
Since in the slow start phase, the cwnd size is increased by 1 segment for every ack's received (irrespective of whether the Ack received is for size less than MSS). So the cwnd is increased by 3 after receiving 3 ACK's, i.e; cwnd= cwnd(initially 1) + 3 = 4 segments. So, the next responses would be packets with byte sequence numbers- 1501, 3001, 4501, 6001 [Since the segment size(MSS=1500B) is not changed].
13 Jan 2019 - 8:48pm
@pritam sir, @ranita mam,
Can you give an elaborate explanation on this? The redundancy totally depends on the type of relation. So, shouldn't it be d)Indeterminate ??
Pls help
29 Dec 2018 - 12:37pm
@sumitverma, Also, why didn't you consider the overflow condition as valid string? I mean C can also be the final state right? for overflow condition like (1001 + 1010 = 0011) ?
9 Dec 2018 - 6:07pm
@sumitverma, The question says that the bits are delivered to the DFA from LSB (bit 0) to MSB (bit N). But your solution seems to assume MSB to LSB i/p.

Pls correct me if I am wrong.

9 Dec 2018 - 6:00pm
@nsarkar, NC is the start state.
9 Dec 2018 - 5:57pm